Operators in Verilog are the same as operators in programming languages. They take two values and compare or operate on them to yield a new result. Nearly all the operators in Verilog are exactly the same as the ones in the C programming language.
| Operator Type | Operator Symbol | Operation Performed |
| Arithmetic | * | Multiply |
| / | Division | |
| + | Addition | |
| - | Subtraction | |
| % | Modulus | |
| + | Unary plus | |
| i | Unary minus | |
| Relational | > | Greater than |
| < | Less Than | |
| >= | Greater than or equal to | |
| <= | Less than or equal to | |
| Equality | == | Equality |
| != | Inequality | |
| Logical | ! | Logical Negation |
| && | Logical And | |
| || | Logical Or | |
| Shift | >> | Right Shift |
| << | Left Shift | |
| Conditional | ? | Conditional |
| Reduction | ~ | Bitwise negation |
| ~& | Bitwise nand | |
| | | Bitwise or | |
| ~| | Bitwise nor | |
| ^ | Bitwise xor | |
| ^~ | Bitwise xnor | |
| ~^ | Bitwise xnor | |
| Concatenation |
{} | Concatenation |
Examples:
x = y + z; //x will get the value of y added to the value of z
x = 1 >> 6; //x will get the value of 1 shifted right by 5 positions
x = !y //x will get the value of y inverted. If y is 1, x is 0 and vise versa